The manufacture of semiconductor devices, such as photovoltaics and solar cells, involves the formation of electrically conductive contacts or current tracks on front and back sides of semiconductors. The metal coating must be able to establish ohmic contact with the semiconductor in order to ensure that charge carriers emerge from the semiconductor into the electrically conductive contacts without interference. In order to avoid current loss, metallized contact grids must have adequate current conductivities, i.e. a high conductivity or a sufficiently high conductor track cross section.
Numerous processes which meet the above requirements exist for metal coating the back side of solar cells. For example, in order to improve current conduction at the back side of solar cells, p-doping directly under the back side is reinforced. Usually aluminum is used for this purpose. The aluminum is applied, for example, by vapor deposition or by being printed onto the back side and being driven in or, respectively, alloyed in. Metal coatings using thick-film techniques are conventional methods for metallizing conductor tracks. Pastes used include metal particles and are electrically conductive as a result. The pastes are applied by screen, mask, pad printing or paste writing. A commonly used process is the screen printing process where finger-shaped metal coating lines having a minimum line width of 80 μm to 100 μm are made. Even at this grid width electrical conductivity losses are evident in comparison with a pure metal structure. This can have an adverse effect on the series resistance and on the filling factor and efficiency of the solar cell. This effect is intensified at smaller printed-on conductor track widths because the process causes the conductor tracks to become flatter. Nonconductive oxide and glass components between the metal particles constitute a fundamental cause of this reduced conductivity.
When metal coating the front sides, or light incidence sides, the objective is to achieve the least amount of shading of the active semiconductor surface in order to use as much of the surface as possible for capturing photons. Complex processes for producing the front side contacts make use of laser and other imaging techniques for the definition of the conductor track structures. The front side of the wafer may optionally be subjected to crystal-oriented texture etching in order to impart to the surface an improved light incidence geometry which reduces reflections. To produce the semiconductor junction, phosphorus diffusion or ion implantation takes place on the front side of the wafer to produce an n-doped (n+ or n++) region and provides the wafer with a PN junction. The n-doped region may be referred to as the emitter layer.
An anti-reflective layer is added to the front side or emitter layer of the wafer. In addition the anti-reflective layer may serve as a passivation layer. Suitable anti-reflective layers include silicon oxide layers such as SiOx, silicon nitride layers such as Si3N4, or a combination of silicon oxide and silicon nitride layers. In the foregoing formulae, x is the number of oxygen atoms, typically x is the integer 2. Such anti-reflective layers may be deposited by a number of techniques, such as by various vapor deposition methods, for example, chemical vapor deposition and physical vapor deposition.
An opening or pattern is then defined on the front side. The pattern reaches through the antireflective layer to expose the surface of the semiconductor body of the wafer. A variety of processes may be used to form the pattern, such as, but not limited to, laser ablation, mechanical means, chemical and lithographic processes. Such mechanical means include sawing and scratching. Typical photolithographic processes include disposing an imageable material on the surface of the wafer, patterning the imageable material to form openings in the anti-reflective layer, transferring the pattern to the wafer, depositing a metal layer in the openings and removing the imageable material. An example of a chemical method of forming an opening on the front side is etching with an etching composition, such as a buffered oxide etch. Such buffered oxide etches may include one or more inorganic acids in combination with a buffering agent, such as an ammonium compound. Prior to the etching step, a mask which is resistant to the etching activity of the etchant is applied in a pattern negative to that of the sites of the current tracks. After etching the mask is usually removed prior to metallization of the current tracks.
A major problem which often arises during formation of the current tracks is undercutting. This results in defective and inefficient semiconductor devices. This problem is common when the current tracks are formed using an etching method in combination with a mask, also known as an etch resist. Upon application of the etch to the selectively masked semiconductor, the etch may not only remove portions of the antireflective layer not covered by the mask but by capillary action seep under the mask at the interface of the mask and the antireflective layer causing portions of the antireflective layer covered by the mask to be undesirably etched away. This results in current tracks having irregular widths which results in irregular and non-uniform current flow in the final metalized device. In addition, such undercutting may form tributaries which adjoin adjacent current tracks resulting in electrical shorts.
Another problem in the formation of current tracks involves the hydrophilic nature of the surface of the semiconductor wafer. Many conventional masking materials used in the manufacture of photovoltaic devices adhere poorly to hydrophilic surfaces. The more hydrophilic the wafer surface the more compromised is the adhesion of the mask to the wafer surface, thus aggravating undercutting of the mask by the etchant. While monocrystalline and polycrystalline wafers and antireflective layers, in general, tend to be more hydrophobic in nature than hydrophilic, there is still some degree of hydrophilic character which may compromise adhesion of masks to their surfaces. In addition, mono cast wafers, also known as hybrid mono wafers, are becoming more common in the photovoltaic industry. These wafers are combinations of both multicrystalline and monocrystalline silicon. They are becoming more desirable for use in the photovoltaic industry because they have a higher potential efficiency than conventional multicrystalline wafers and are less costly than conventional monocrystalline wafers. However, such mono cast wafers are substantially more hydrophilic than the multicrystalline and monocrystalline wafers and many conventional masks do not adhere to their surfaces to the degree desired to prevent undercutting.
As the industry seeks to manufacture semiconductor devices using thinner and more delicate semiconductor wafers and at the same time increase the plurality of current tracks on the front side of the wafers to increase electrical out-put, the problem becomes compounded by difficulty of working with smaller and more delicate materials. In addition, current tracks with smaller dimensions reduce shadowing. When the semiconductor is used as a means of collecting incident radiation, such as in photovoltaic devices and solar cells, large current tracks may block incident light from impinging on the antireflection layer, thus reducing the amount of incident light which is absorbed by the semiconductor with the result of compromising the efficiency of the photovoltaic device or solar cell. Accordingly, there is a need for a method and etch resist which substantially reduces or eliminates the problem of undercutting in the formation of current tracks on semiconductor wafers and permits the formation of fine line current tracks.